Who Builds 2nm Outside Taiwan First? Inside the Europe-Japan-US Advanced Semiconductor Fab Race

Taiwan makes approximately 90% of the world's most advanced semiconductor chips. One company — TSMC — makes the overwhelming majority of those chips. TSMC's most advanced fabs are located in Hsinchu and Tainan, a 90-minute drive from the Chinese mainland and directly in the potential path of any military conflict over Taiwan's status.

This geographic concentration is the single most discussed supply chain risk in the technology industry. And it has triggered the largest coordinated effort to diversify semiconductor manufacturing in history: a simultaneous race by Japan, Europe, and the United States to establish leading-edge fab capacity outside Taiwan.

The programmes are at different stages of maturity, face different challenges, and will reach production at different timelines. Here is a comprehensive status update as of March 2026.

Japan: Rapidus Targeting 2nm by 2027

Rapidus is Japan's most ambitious industrial project in a generation. Established in August 2022 by a consortium of eight Japanese companies (Toyota, Sony, NTT, NEC, SoftBank, Kioxia, Denso, and Mitsubishi UFJ Financial Group) with $700M in initial government backing and subsequent government support that has grown to over $6.5B, Rapidus is attempting to go from zero advanced semiconductor manufacturing to 2nm production in approximately five years.

The technology partner is IBM. In December 2022, IBM and Rapidus announced a joint development partnership for 2nm chip technology using IBM's semiconductor research base in Albany, New York. IBM has been developing 2nm technology in research contexts since demonstrating a 2nm test chip in 2021.

Current status (March 2026):

• Pilot line construction at Chitose, Hokkaido is ongoing. The location was chosen for cool climate (reducing data center and fab cooling costs) and land availability.
• ASML has delivered EUV lithography equipment to the Chitose facility. This is significant — Japan's close US alliance relationship means ASML export licences for Japan are not subject to the China-style restrictions.
• Pilot production (small-volume test wafers) is targeting late 2025 / early 2026.
• Volume production target: 2027, initially for domestic Japanese customers (Toyota for automotive AI chips, NTT for telecom, Sony for imaging and AI sensors).

The challenge: Rapidus is attempting to compress a decade of foundry capability development into five years, starting from almost no advanced manufacturing experience. TSMC's N3 process node took 7 years of development from initial research to volume production. Rapidus is targeting equivalent or better technology in less time, with a workforce that needs to be trained from scratch.

Industry analysts assess this timeline as aggressive to the point of being implausible for volume production — but acknowledge that the Japanese government's unlimited financial commitment changes the calculus. The question is not whether Japan can build the facility; it is whether the process technology will achieve competitive yields on schedule.

Europe: TSMC Dresden and the ESMC Joint Venture

TSMC's European facility is the most strategically significant of the non-Taiwan fab projects because it carries TSMC's process technology — the same technology that powers Apple's A-series chips and Nvidia's GPU accelerators.

The European Semiconductor Manufacturing Company (ESMC) is a joint venture: TSMC (70%), NXP (10%), Infineon (10%), and Bosch (10%). The facility is located in Dresden, Germany.

Key facts:

• Technology node: N28 (28nm) and N16 (16nm equivalent), not leading-edge 2nm. This is designed for automotive, industrial, and IoT applications — markets where European companies have dominant positions — not for AI accelerators.
• Fab size: Initial capacity of approximately 40,000 wafers per month.
• EU funding: Approximately €5B in EU and German government subsidies under the European Chips Act.
• Timeline: Groundbreaking ceremony August 2024. Volume production target: late 2027.

The critical limitation for AI hardware purposes: ESMC Dresden will not manufacture leading-edge AI chips. It targets the automotive and industrial chip markets where Europe has significant demand and where TSMC's advanced nodes are overkill. For the AI hardware supply chain, Dresden adds little direct diversification from TSMC Taiwan.

TSMC's leading-edge technology outside Taiwan is in Arizona (N4 process, volume production 2024; N3 target 2025-2026). Dresden is a separate strategic purpose: securing European supply of mature-node chips for the automotive industry.

Intel Germany: Delayed but Not Dead

Intel's Magdeburg, Germany fab — Intel Fab 34 and 35 — was announced with significant fanfare in March 2022 as a major CHIPS Act-era investment for Europe. €17B investment, €6.8B in German government subsidies, targeting Intel's most advanced process nodes (initially 18A, later generations).

Current status: The Magdeburg fab is significantly delayed. Intel announced in September 2024 that construction start was being postponed "by approximately two years" due to weak chip demand, Intel's financial challenges ($16.6B net loss in 2024), and uncertainty about Intel Foundry Services customer commitments.

The delay does not mean cancellation — the German government subsidies remain committed and the land is secured. But the timeline has shifted from "volume production 2027" to "volume production 2030 at the earliest."

For Europe, this leaves a gap: TSMC Dresden (mature nodes, 2027) but no leading-edge Intel fab before 2030 at the earliest.

US: TSMC Arizona and Intel 18A

The US has the clearest path to near-term leading-edge fab diversification:

TSMC Arizona (Phoenix): Fab 21 is in volume production at N4 process (equivalent to TSMC's N5 generation). Confirmed customers include Apple (A16-class chips) and Nvidia. N3 process (the generation used for Apple A17 and current Nvidia GPUs) is ramping in Fab 21 in 2025-2026. TSMC has announced plans for a third Arizona fab (Fab 22) for leading-edge process beyond N3.

Intel Arizona (Chandler): Intel 18A (see dedicated coverage) is the leading-edge foundry bet. Volume production target late 2026, with Microsoft custom silicon as the first confirmed customer.

Samsung Austin: Samsung's Texas fab was damaged in a freeze event in 2021 and has been recovering. Samsung produces 4nm and below at its S5 Line (Austin, Taylor). The Taylor expansion (S6 Line) is adding capacity at sub-3nm process for 2026 production. Samsung is a distant second to TSMC in leading-edge foundry but represents meaningful additional US-based advanced capacity.

The Strategic Picture

The combined effect of these programmes: by 2028-2030, leading-edge semiconductor manufacturing will be meaningfully more geographically diversified than it is today.

TSMC Arizona N3 (2025-2026) and N2 (planned 2028): US-based leading-edge production for the first time for the most advanced nodes.

Intel 18A (2026): If yields succeed, a second leading-edge foundry in the US at competitive technology.

Rapidus Japan (2027): A third geography for advanced production, initially small volume.

ESMC Dresden (2027): Mature-node European production for automotive/industrial; does not address leading-edge AI chip concentration.

For AI hardware supply chains: the key development is TSMC Arizona N3 and Intel 18A. These are the processes used for AI accelerators. Geographic diversification of these specific processes is what reduces the Taiwan concentration risk for AI infrastructure.

The window of maximum risk — where almost all leading-edge AI chip production is concentrated in TSMC Taiwan — is 2026. The risk meaningfully decreases as TSMC Arizona N3 ramps through 2026-2027 and as Intel 18A (if successful) adds US-based foundry capacity for AI chip designs.